It is now well known that testing for CDM Electrostatic Discharge [ESD]
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
" href="https://incompliancemag.com/terms/electrostatic-discharge/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">ESD evaluation is becoming a bigger challenge. Previously (In Compliance Magazine, March 2021), capacitively coupled TLP (CCTLP) was described as an alternate approach. It offers many advantages compared to the standardized field-induced CDM setup according to the JS002 standard [1]. Testing of a package, bare die, or wafer is enabled with high reproducibility. The failure correlation between CDM and CCTLP has been investigated based on peak current stress levels and not by a charging voltage level [2]. If testing with an alternative CDM method as CCTLP is done to reproduce JS002, the CDM charging voltage must be transferred into peak current levels.
A measure for the severity of the CDM stress is the effective Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance Ceff of a device [3]. Ceff characterizes the amount of exchanged charge between DUT and test setup at a specific stress level (e.g., VCDM) in a specific testing environment.
Products can be categorized with respect to Ceff in an FICDM setup because of the direct relation to the peak current for a given test voltage, as described in [4].
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance values play a role according to the three-capacitances model, as shown in Figure 1.
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance CDUT is defined as the Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance from the device to the field plane. The static Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance value for CDUT is extracted from a Finite Element Method [FEM]
A technique for finding approximate solutions to boundary value problems for differential equations.
" href="https://incompliancemag.com/terms/finite-element-method/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">Finite Element Method (Finite Element Method [FEM]
A technique for finding approximate solutions to boundary value problems for differential equations.
" href="https://incompliancemag.com/terms/finite-element-method/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">FEM) simulation according to the three-capacitances model shown in Figure 1. Differences between Ceff and CDUT capacitances either extracted from FEM-simulation or calculated as parallel plate Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance Cplate (A is the area of the DUT, and d is the thickness of the FR4 dielectric layer) are demonstrated based on the metallic circular coin modules (height 1.27 mm, diameters see Table 1).
Table 1: Coin diameter in mm, height of coin: 1.27 mm
P1P2JSP4JLP5P6P7P82.294.498.8918.0325.3736.0543.0451.0262.52表 1: コインの直径 (mm)、コインの高さ: 1.27 mm
The Finite Element Method [FEM]
A technique for finding approximate solutions to boundary value problems for differential equations.
" href="https://incompliancemag.com/terms/finite-element-method/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">FEM simulation of CDUT does not coincide with the simple plate Capacitor
A passive electronic component that consists of two conductive plates separated by an insulating dielectric.
" href="https://incompliancemag.com/terms/capacitor/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitor formula since fringing effects are also considered, especially for small devices. CDUT also shows a linear dependency on the area-capacitance relation. In contrast, Ceff values show saturation with increasing area or volume of a DUT. As a result, not only the area of the bottom surface contributes to the Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance but also the sidewalls and, therefore, the volume.
To calculate the CDM discharge current from the volume, the device area is considered as the maximum edge length a x b, including the pins and mold compound (Figure 3). For a bare die product that does not go into a final package, the area is calculated from the edge length of the silicon accordingly.
デバイス寸法の影響体積から CDM 放電電流を計算するには、ピンとモールドコンパウンドを含むデバイス面積を最大エッジ長さ a x b とみなします (図 3)。最終パッケージに組み込まれないベアダイ製品の場合、面積はシリコンのエッジ長からそれに応じて計算されます。
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Statistical analysis of CDM testing data shows the relevance of device area and volume for predicting stress current levels in a CDM test since the height h of the device has a non-neglectable influence on the discharge current. A database with over 15 million CDM waveforms has been used to evaluate the relation between area, volume, peak current, and the effective Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance Ceff. The area and volume of about 10000 different device types can be derived from the package dimensions included in the database. For each device type, only the waveforms are evaluated, showing the maximum positive peak current Ipeak out of several CDM discharges for a positive charging voltage level of 500 V. According to the measurement results, the peak current reduces with the increasing height of the device.
- スポンサーより - 図 3: デバイス面積 A=a x b および体積 V=A x h の定義 CDM テスト データの統計分析により、高さ h 以降の CDM テストにおけるストレス電流レベルの予測におけるデバイス面積と体積の関連性が示されています。デバイスの影響は放電電流に無視できない影響を与えます。 1,500 万を超える CDM 波形を含むデータベースを使用して、面積、体積、ピーク電流、実効静電容量 Ceff の間の関係を評価しました。約 10,000 種類の異なるデバイスの面積と体積は、データベースに含まれるパッケージの寸法から導き出すことができます。デバイスの種類ごとに、波形のみが評価され、500 V の正の充電電圧レベルでの数回の CDM 放電のうちの最大の正のピーク電流 Ipeak が示されます。測定結果によると、ピーク電流はデバイスの高さが増加するにつれて減少します。 。
This can be shown using the set of nine cylindrical solid metal coins P1 to P8 with different diameters and volumes (see Table 1)[5]. The coin reference for the peak current still gives a reasonable orientation for the maximum peak current. Figure 4 shows the dependency of the effective Capacitance
The ability of a a component or circuit to store an electric charge.
" href="https://incompliancemag.com/terms/capacitance/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">capacitance Ceff on the volume. For very flat packages, the limit of the coins is exceeded but still givesa meaningful value. The coin with the smallest volume and, therefore, lowest Ceff reaches the lowest peak current and vice versa. For devices, this means that their Ceff with the according current can be related to the current of the coins. As shown, the device height is becoming relevant for the estimation of the stress current level, therefore, the volume is introduced as the preferred parameter. Thus, the volume value can be used to estimate the expectable peak current with respect to the coin values as shown in Figure 5.
A practical solution is presented for the problem, how CDM targets can be translated to current test levels. CDM current test levels are important as they allow using alternative CDM testing methods, such as CCTLP. The first testing proposal is a simple approach, representing the worst case: Increase the CCTLP testing voltage until the peak current value is reached at the product pin given in Figure 5.
To avoid over-testing, these levels can be lowered based on the second proposal if details of the electrical properties on-package and on-chip are known. Ceff values can be predicted by Finite Element Method [FEM]
A technique for finding approximate solutions to boundary value problems for differential equations.
" href="https://incompliancemag.com/terms/finite-element-method/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">FEM simulation even before devices are available.
A private non-profit organization that oversees the development of voluntary consensus standards for products, services, processes, systems, and personnel in the United States.
" href="https://incompliancemag.com/terms/american-national-standards-institute/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">ANSI/JEDEC/ESDA, “Joint Standard for Electrostatic Discharge [ESD]
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
K. Esmark, R. Gaertner, S. Seidl, F. zur Nieden, H. Wolf and H. Gieser, “Using CC-TLP to get a CDM robustness value,” 2015 37th Electrical Overstress/Electrostatic Discharge [ESD]
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
" href="https://incompliancemag.com/terms/electrostatic-discharge/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">ESD), Anaheim, CA, USA, 2007, pp. 5A.1‑1‑5A.1-10.
N. Jack, B. Carn and J. Morris, “Toward Standardization of Low Impedance Contact CDM,” 2019 41st Annual EOS/Electrostatic Discharge [ESD]
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
" href="https://incompliancemag.com/terms/electrostatic-discharge/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">ESD), Riverside, CA, USA, 2019, pp. 1-7.
T. J. Maloney and N. Jack, “CDM Tester Properties as Deduced From Waveforms,” in Institute of Electrical and Electronics Engineers [IEEE]
A professional association that is dedicated to advancing technological innovation and excellence.
" href="https://incompliancemag.com/terms/institute-of-electrical-and-electronics-engineers/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">IEEE Transactions on Device and Materials Reliability, vol. 14, no. 3, pp. 792-800, Sept. 2014, doi: 10.1109/TDMR.2014.2316177
L. Zeitlhoefler, T. Lutz, F. Zur Nieden, K. Esmark and R. Gaertner, “Voltage to Current Correlation for CDM Testing,” 2023 45th Annual EOS/Electrostatic Discharge [ESD]
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
Sudden flow of electricity between two electrically charged objects caused by contact, an electrical short, or dielectric breakdown.
" href="https://incompliancemag.com/terms/electrostatic-discharge/" data-mobile-support="0" data-gt-translate-attributes='[{"attribute":"data-cmtooltip", "format":"html"}]' tabindex="0" role="link">ESD), Riverside, CA, USA, 2023, pp. 1-11, doi: 10.23919/EOS/ESD58195.2023.10287735
参考文献ANSI/JEDEC/ESDA、「静電気放電感受性試験の共同規格 – 帯電デバイスモデル」、JS-002、2018K。 Esmark、R. Gaertner、S. Seidl、F. zur Nieden、H. Wolf、H. Gieser、「CC-TLP を使用して CDM 堅牢性値を取得する」、2015 年第 37 回電気的過ストレス/静電放電シンポジウム (EOS/ESD)、米国ネバダ州リノ、2015 年、1-10.B ページ。 C. Atwood、Y. Zhou、D. Clarke、および T. Weyl、「FICDM ピーク電流に対する大きなデバイス容量の影響」、2007 年第 29 回電気的過ストレス/静電放電シンポジウム (EOS/ESD)、アナハイム、カリフォルニア州、米国、2007 年、 pp. 5A.1‑1‑5A.1-10.N。 Jack、B. Carn、J. Morris、「低インピーダンス接触 CDM の標準化に向けて」、2019 41st Annual EOS/ESD Symposium (EOS/ESD)、米国カリフォルニア州リバーサイド、2019 年、pp. 1-7.T. J. Maloney および N. Jack、「波形から推定される CDM テスターのプロパティ」、IEEE Transactions on Device and Materials Reliability、vol. 14、いいえ。 3、792-800 ページ、2014 年 9 月、文書: 10.1109/TDMR.2014.2316177L。 Zeitlhoefler、T. Lutz、F. Zur Nieden、K. Esmark、R. Gartner、「CDM テストのための電圧と電流の相関」、2023 第 45 回年次 EOS/ESD シンポジウム (EOS/ESD)、リバーサイド、カリフォルニア州、米国、2023 年、ページ 1-11、土井: 10.23919/EOS/ESD58195.2023.10287735
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